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Lattice Semiconductor
Functional Description
A CIC decimator and interpolator with N stages are shown in Figure 2-2 , where I and C represent an integrator and
a comb, respectively. The symbols, ? R and ? R, represent down-sampling and up-sampling, respectively.
Figure 2-2. CIC Decimator and Interpolator
(a) CIC Decimator
x(n)
I
I
I
R
C
C
C
y(n)
(b) CIC Interpolator
N Stages
N Stages
x(n)
C
C
C
R
I
I
I
y(n)
N Stages
N Stages
The system transfer function of the CIC decimator and interpolator in the z-plane is
? z
H(z) =
(1 - z -RM ) N
(1 - z -1 ) N
=
RM-1
k=0
-k
N
(1)
The frequency response can be derived by substituting z=j 2?f in Equation 1, where f is the frequency relative to the
low sampling rate, f S /R.
? f
H(f)  =
sin ? Mf
sin
R
N
(2)
By using sin xYx for small x, we can approximate Equation 2 for a large R as
sin ? Mf
? f
N
H(f) = = RM
sin ? Mf
? Mf
N
= [RMsinc( ? Mf)] N
if f << M
(3)
R
Equation 3 indicates that the frequency response has nulls (zeros) at integer multiples of f=1/M.
As given in Equation 3, the frequency response of the CIC filter resembles a sinc waveform. The main lobe of the
sinc wave is the passband and the side lobes are the aliasing or imaging bands. The parameters N, M, and R
decide the characteristics of the passband and the aliasing bands.
Interfacing with the CIC Filter
To ensure proper functioning of the CIC filter for different usage scenarios, the handshake signals must be correctly
used and the rules of interfacing must be followed. For a CIC filter, the input and output data rates are not the same
and one of the rates is higher than the other by a factor of R, the sampling rate factor. For multi-channel operations,
the channel index changes more frequently than the data index, in both input and output data streams. For exam-
ple, for a three-channel decimator, data 0 of channel 0 is followed by data 0 of channel 1 and data 0 of channel 2.
After data 0 of all the channels are applied, data 1 for the channels follows. For easier understanding, the terms
“input data cycle” and “output data cycle” are used and explained for each case.
For a decimator, R input samples are read for every output sample. For a single-channel decimator, the inputs are
applied sequentially and one output data is available every R cycles. Here the input data cycle is one cycle long
and the output data cycle is R cycles long. The availability of valid output data is indicated by the outvalid signal,
which goes high for the first clock cycle of an output data cycle. There could be arbitrary breaks in the input data
IPUG42_02.6, August 2010
10
Cascaded Integrator-Comb (CIC) Filter User’s Guide
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